FREE LESSON · Architecture & memory · 4 OF 4
Amdahl's Law and CPU Performance
Architecture mastery: performance is a budget — Reason with bottlenecks, parallelism, and measurement
Elapsed time is the result; every rate is an explanation.
Instruction count, cycles per instruction, and clock period offer one decomposition, but memory stalls, I/O waits, contention, and parallel work complicate it. Amdahl’s law states that improving one fraction of execution limits total speedup according to how much time that fraction originally consumed.
Optimize measured time in the real workload, not an impressive component in isolation.
Counters turn a story into a profile
Wall time says the user-visible outcome. Hardware counters can show instructions, cycles, branches, and cache misses; system tools expose I/O and scheduling. Compare a hypothesis with several measurements: high last-level misses plus stalled cycles supports a memory-bound diagnosis more than instruction count alone.
A metric is evidence only when its definition and causal connection to the outcome are understood.