Digital logic · 1938 · Claude E. Shannon
A Symbolic Analysis of Relay and Switching Circuits
Treat Boolean algebra as an engineering language for specifying, simplifying, and synthesizing relay circuits.
How to read the original
- Read the definitions of hindrance before manipulating symbols: zero denotes a closed circuit and one an open circuit.
- Use Series-Parallel Two-Terminal Circuits to connect the algebra to physical paths.
- Compare a simplified network with its original by exhaustive input assignments, then list electrical properties outside that equivalence.
Choose the meaning of zero before using algebra
Shannon makes switching networks amenable to symbolic manipulation and synthesis. A crucial reading detail is his hindrance convention: zero represents a conducting path and one an open path. In that convention the plus symbol denotes series connection and multiplication denotes parallel connection. Modern teaching often defines a Boolean variable as contact closure instead, making series correspond to AND and parallel to OR. Both conventions are consistent, but silently mixing them reverses interpretations.
The following worked design uses closure variables explicitly. Let A and B mean that two guard switches are closed, and let E mean that an enable switch is closed. A motor-control contact should conduct when either guard closes and enable is present. Its closure function is F=E AND (A OR B). One realization places E in series with parallel branches A and B. A second realization places two series paths, E-A and E-B, in parallel. Distributivity establishes their logical equivalence.
Count the benefit and prove the promise
The expanded realization uses two contacts controlled by E, while the factored realization uses one. Assume contacts are ideal, identical, and available in the required normally-open or normally-closed forms. Factoring reduces this contact count from four to three. That is a concrete implementation benefit, but the count does not establish which design is best once timing, wiring length, loading, or fault tolerance matters.
Check all eight assignments. If E is false, both realizations reject every A,B combination. If E is true, they conduct for 01,10,11 and reject 00. This finite enumeration proves combinational equivalence for the specified three Boolean inputs. It does not prove correct behavior while contacts are transitioning, because intermediate voltages and unequal delays are absent from the model.
Translate the same network into hindrance variables a=NOT A, b=NOT B, and e=NOT E. The output hindrance is e OR (a AND b). This follows by complementing F and applying De Morgan’s law. In Shannon’s connection notation it appears as e+ab: a series hindrance e combined with the hindrance of two parallel contacts. The two descriptions agree about physical conduction even though their literal-looking formulas differ.
Synthesis is a disciplined translation
Begin with a behavioral specification, construct a truth table, derive a Boolean expression, simplify it using valid identities, and choose a circuit representation. Each translation needs an interpretation. A Boolean variable may mean voltage high, switch closed, relay energized, or permission granted; these are not interchangeable without an explicit mapping.
For another example, A OR (A AND B) simplifies to A by absorption. The B-controlled path adds no accepting assignment. Removing it preserves the truth table, but might alter failure behavior if a physical contact gets stuck open. Reliability questions require an expanded model containing failures as inputs or states.
The paper’s lasting method is to make equivalence inspectable before building hardware. Its idealized algebra is powerful precisely because it hides much physical detail. After the symbolic proof, engineering must restore relevant details: valid voltage regions, settling time, fan-out, and the effects of bounce or noise. Do not present a simpler Boolean formula as a complete electrical design or claim that every locally minimal expression minimizes a whole fabricated system.
Reconstruction exercise
An alarm should activate when an enable input E is true and exactly one sensor, A or B, is true. Write its closure-variable expression, an equivalent sum of products, and a hindrance-variable expression using e=NOT E, a=NOT A, b=NOT B. Enumerate the accepted input triples. Explain why replacing exclusive OR with ordinary OR is a meaningful defect. Finally identify one fault or timing property that the truth-table equivalence does not cover, and describe the extra assumption or measurement needed to study it.
Worked solution
The closure expression is E AND (A XOR B), or (E AND A AND NOT B) OR (E AND NOT A AND B). Only triples (E,A,B)=(1,1,0) and (1,0,1) activate the alarm. Complementing gives the output hindrance e OR (a AND b) OR (NOT a AND NOT b): the circuit is nonconducting when disabled or when the sensor closure values agree. Ordinary OR incorrectly activates for E=A=B=1, so that single assignment is a decisive counterexample. A truth table treats inputs as settled values and ignores a brief activation caused by unequal path delays while sensors change together. To analyze that possibility, specify transition timing and gate or contact delays, then simulate or measure the resulting waveform. Alternatively, add stuck-contact faults to the model and compare failure outcomes. Neither question is answered merely by algebraic equality over ideal Boolean assignments.
Test the limits and transfer the idea
1. Boolean proof and circuit design · allow 40 minutes
Synthesize a majority circuit in two conventions
Design an ideal relay network that conducts exactly when at least two of three independent closure inputs A,B,C are true. Derive the closure function, factor it to reduce contact occurrences, and enumerate every accepted assignment. Then use hindrance variables a=NOT A,b=NOT B,c=NOT C and derive the output hindrance.
Explain why the majority function has the same symbolic three-product form in both conventions without implying that plus and multiplication represent the same physical connection in those conventions. Count contacts in your explicit unfactored and factored series-parallel realizations. State whether your simplification proves global minimality for every available relay implementation.
Get a starting hint
The complement of “at least two closed” is “at least two open.” First fix what each variable means.
Compare your reasoning with the worked solution
The closure function is F=(A AND B) OR (A AND C) OR (B AND C). It accepts exactly 110,101,011,111. Factoring gives F=(A AND (B OR C)) OR (B AND C). An unfactored construction has three parallel two-contact series paths, using six contact occurrences. The factored construction has an A contact in series with parallel B,C contacts, in parallel with a B-C series path, using five. This count permits multiple physical contacts operated by the same relay.
Output hindrance is H=NOT F. Substituting A=NOT a and similarly for B,C gives H=(a OR b) AND (a OR c) AND (b OR c), which simplifies to (a AND b) OR (a AND c) OR (b AND c). It is true exactly when at least two contacts are open, so the majority expression is self-dual under simultaneous input and output complementation.
For closure variables, AND corresponds to series and OR to parallel. For Shannon's hindrance variables, the plus notation is OR on hindrances but describes series connection; multiplication is AND on hindrances but describes parallel connection. Identical-looking algebra can therefore denote a dual physical topology. The truth table establishes ideal steady-state behavior. The six-to-five comparison proves an improvement between these two explicit realizations, not global minimality over bridge networks, multiway contacts, timing constraints, or shared hardware. Physical loading and relay bounce are not represented.
Check your reasoning
- Produces the exact four accepted assignments and a valid five-contact factoring.
- Derives hindrance consistently and explains the self-dual majority form.
- Limits the equivalence and contact-count claim to its stated model.
2. Timing counterexample · allow 40 minutes
Find the transient that a truth table omits
Use closure-valued Boolean signals and an original ideal-delay implementation F=(A AND B) OR ((NOT A) AND C). Set B=C=1 and change A from 1 to 0 at t=0. Assume the A-B path falls at t=2 ns, the inverted-A-C path rises at t=5 ns, and the final OR has zero delay for this exercise.
Draw the output intervals and compare them with the settled truth table. Prove that adding the term B AND C changes no settled output for any of the eight input assignments, then explain how it removes this particular glitch. State the limits of the repair and how it relates to, rather than contradicts, Shannon's switching algebra.
Get a starting hint
The added term covers the period when both original paths are temporarily off. Prove its logical redundancy separately from its timing effect.
Compare your reasoning with the worked solution
Before t=0, A-B is one and inverted-A-C is zero, so F=1. From 0 through 2 ns, the old conducting path still supplies one. From 2 through 5 ns, both paths are zero and F drops to zero. From 5 ns onward, the second path supplies one. Both settled endpoint assignments have F=1, so the low pulse is a static-one hazard in this invented delay model.
To prove redundancy of BC, consider any assignment where BC=0: the added term has no effect. Where BC=1, either A=1, making AB=1, or A=0, making (NOT A)C=1. Thus BC implies the original expression, and F OR BC=F for every Boolean assignment. Equivalently this is the consensus identity. With B and C held high and the added path already settled, BC continuously supplies one during A's transition and the OR output cannot fall in the stipulated model.
The extra contacts improve this timing property while increasing the expression's implementation size. The repair does not guarantee freedom from every hazard when multiple inputs change, when BC itself is disturbed, or when physical contact bounce and analog thresholds violate the ideal-delay assumptions. Shannon's algebra establishes equivalence of settled switching states under a chosen interpretation. This example exposes an omitted timing dimension; it does not refute that algebra. A complete design requires both a Boolean specification and an appropriate transition/fault model.
Check your reasoning
- Finds the 2–5 ns low interval despite equal endpoint outputs.
- Proves the added term is logically redundant over all assignments.
- Explains the timing repair and its single-transition assumptions.
Check your understanding
With closure variables, which circuit implements E AND (A OR B)?
- E in series with parallel A and B branches.
- E, A, and B all in parallel.
- E in parallel with series A and B.
Explanation
A conducting path must include E and at least one of the two alternative sensor branches.
Why can Shannon’s series notation use plus without contradicting modern series-as-AND teaching?
- The paper uses ordinary resistor values.
- Its variables encode open-circuit hindrance, while the modern example encodes closure.
- Boolean algebra changed after 1938.
Explanation
Complementing the represented property exchanges the relevant Boolean interpretations.
Original paper and sources
Claude E. Shannon. A Symbolic Analysis of Relay and Switching Circuits. Electrical Engineering, volume 57, 1938, pp. 713-723. Linked copy is the journal paper, distinct from the longer thesis scan.
Read the original paper →Read the primary paper: Carnegie Mellon University Qatar
- A Symbolic Analysis of Relay and Switching Circuits: Carnegie Mellon University Qatar