# David Patterson

> 1947– · Computer Scientist, RISC Pioneer
>
> **Recorded contribution:** RISC (SPARC/RISC-V); RAID; Computer Architecture; great ideas in computer architecture

## How to use this dossier

Read for a causal chain, not a hero story: inherited problem → contribution → mechanism → downstream capability → limit. Then close the page and complete the reconstruction exercise from memory.

## 1. Historical orientation

David Patterson (born 1947) led Berkeley's RISC project, co-developed RAID terminology and analysis with Garth Gibson and Randy Katz, co-authored influential architecture textbooks with John Hennessy, and helped initiate the open RISC-V instruction set with Krste Asanović and colleagues. Berkeley RISC was one of several reduced-instruction efforts alongside IBM 801 and Stanford MIPS. Patterson's characteristic method is quantitative architecture: measure workloads, simplify common operations, and evaluate complete hardware–compiler–storage systems. The registry's 'SPARC/RISC-V' shorthand should not imply he created SPARC, a Sun architecture influenced by Berkeley RISC.

## 2. The problem inherited

Complex processors and expensive reliable storage needed designs whose performance and dependability could be improved with simple components plus software-visible organization.

## 3. The central contribution

Patterson led empirical RISC architecture and co-developed system-level abstractions for disk arrays and open instruction sets.

## 4. Reconstruct the mechanism

1. Measure compiled workloads and identify common simple operations, branches, loads, and stores.
2. Use a regular load/store instruction set and many registers so execution pipelines remain simple and predictable.
3. Make compilers schedule operations and allocate registers rather than encoding many irregular hardware instructions.
4. Evaluate performance with benchmark time, cost, energy, and dependability instead of instruction count alone.

## 5. What changed downstream

- Berkeley RISC influenced SPARC and the broader reduced-instruction movement.
- RAID transformed storage reliability and performance using arrays of commodity disks.
- RISC-V created an open extensible instruction-set ecosystem for research and products.

## 6. Attribution, limits, and uncertainty

- Cocke, Hennessy, Asanović, Gibson, Katz, students, and industry teams own distinct contributions across these milestones.
- Modern RISC processors can have extremely complex microarchitectures, so the label does not imply simple whole chips.
- Benchmarks can be optimized or gamed and may omit memory, software, security, and real workload diversity.

## 7. Reconstruction lab

Translate one loop into load/store and complex-instruction versions, schedule both through a five-stage pipeline, and compare cycles, bytes, and decode assumptions. Change memory latency and explain the new bottleneck. Report energy and code-size proxies alongside runtime so one metric does not predetermine the verdict.

## 8. Evidence trail

- [The Case for the Reduced Instruction Set Computer](https://doi.org/10.1145/641914.641917) — Computer Architecture News
- [David Patterson](https://www2.eecs.berkeley.edu/Faculty/Homepages/patterson.html) — University of California, Berkeley

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*Research checked 2026-08-09. Dates, roles, and claims about living people are historical snapshots. Linked sources remain the authority; this dossier is original instructional synthesis.*